Search results for "Hardware description language"
showing 10 items of 15 documents
FPGA Implementation of an Adaptive Filter Robust to Impulsive Noise: Two Approaches
2011
Adaptive filters are used in a wide range of applications such as echo cancellation, noise cancellation, system identification, and prediction. Its hardware implementation becomes essential in many cases where real-time execution is needed. However, impulsive noise affects the proper operation of the filter and the adaptation process. This noise is one of the most damaging types of signal distortion, not always considered when implementing algorithms, particularly in specific hardware platforms. Field-programmable gate arrays (FPGAs) are used widely for real-time applications where timing requirements are strict. Nowadays, two main design processes can be followed for embedded system design…
Hardware implementation of a robust adaptive filter: Two approaches based in High-Level Synthesis design tools
2009
Abstract Adaptive filters are used in a wide range of applications. Impulsive noise affects the proper operation of the filter and the adaptation process. This noise is one of the most damaging types of signal distortion, not always considered when implementing algorithms. Field Programmable Gate Array (FPGA) are widely used for applications where timing requirements are strict. Nowadays, two main design processes can be followed, namely, Hardware Description Language (HDL) and a High Level Synthesis (HLS) design tool for embedded system design. This paper describes the FPGA implementation of an adaptive filter robust to impulsive noise using two approaches based in HLS and the implementati…
Exploring FPGA‐Based Lock‐In Techniques for Brain Monitoring Applications
2017
Functional near‐infrared spectroscopy (fNIRS) systems for e‐health applications usually suffer from poor signal detection, mainly due to a low end‐to‐end signal‐to‐noise ratio of the electronics chain. Lock‐in amplifiers (LIA) historically represent a powerful technique helping to improve performance in such circumstances. In this work a digital LIA system, based on a Zynq® field programmable gate array (FPGA) has been designed and implemented, in an attempt to explore if this technique might improve fNIRS system performance. More broadly, FPGA‐based solution flexibility has been investigated, with particular emphasis applied to digital filter parameters, needed in the digital LIA, and its …
FPGA-based embedded Logic Controllers
2014
In general case, reconfigurable logic controllers (RLC) are included into reactive digital embedded systems, carrying out control for several processes proceeding concurrently. The paper presents a practical application of a formal, rule-based specification language in Gentzen sequent logic, which is used as an intermediate textual description of a control interpreted Petri net. On the other hand exactly the same description serves also as logic design expressions, related with different versions of functionally equivalent concurrent state machine models, considered on Register Transfer Level. The symbolic rule-based specification of Petri net-based embedded Logic Controllers (LCs) can be s…
Concept and Development of Modular VLIW Processor Based on FPGA
2010
Modern FPGA chips, with their larger memory capacity and reconfigurability potential, are opening new frontiers in rapid prototyping of embedded systems. With the advent of high density FPGAs it is now possible to implement a high performance VLIW processor core in an FPGA. Architecture based on Very Long Instruction Word (VLIW) processors are an optimal choice in the attempt to obtain high performance level in embedded system. In VLIW architecture, the effectiveness of these processors depends on the ability of compilers to provide sufficient instruction level parallelism(ILP) in program code. Using advanced compiler technology could take these functions, This paper describes research resu…
AMADEUS-The acoustic neutrino detection test system of the ANTARES deep-sea neutrino telescope
2011
The AMADEUS (ANTARES Modules for the Acoustic Detection Under the Sea) system which is described in this article aims at the investigation of techniques for acoustic detection of neutrinos in the deep sea. It is integrated into the ANTARES neutrino telescope in the Mediterranean Sea. Its acoustic sensors, installed at water depths between 2050 and 2300 m, employ piezo-electric elements for the broad-band recording of signals with frequencies ranging up to 125 kHz. The typical sensitivity of the sensors is around - 145 dB re 1 V/mu Pa (including preamplifier). Completed in May 2008, AMADEUS consists of six "acoustic clusters", each comprising six acoustic sensors that are arranged at distanc…
A New Model for Sigma-Delta Modulator Oriented to Digitally Controlled DC/DC Converter
2007
Recent research activities have shown the feasibility and advantages of using digital controller ICs specifically developed for high-frequency switching converters, highlighting a challenging future trend in Switched-mode power supplies (SMPS) applications. Up to a few years ago, the application of digital control for SMPS was impractical due to the high cost and low performance of DSP and microcontroller systems, even if the advantages that digital controllers offer were well known, such as immunity to analog component variations and ability to implement sophisticated control schemes and system diagnostics. Digital controller ICs potentially offer other advantages from the integrated desig…
Analysis of the influence of processor hidden registers on the accuracy of fault injection techniques
2004
Modern processors tend to increase the number of registers, being part of them not accessible by the instruction set. Traditionally, the effect of faults in these hidden registers has not been considered during system validation using fault injection. In this paper, a study of the importance of faults in hidden registers is performed. Firstly, we have analysed the sensitivity of hidden registers to faults in combinational logic. In a second phase, we have analysed the impact of the faults occurred in hidden registers on system behaviour. A broad set of permanent and transient faults have been injected into the models of two typical commercial microcontrollers, using a VHDL-based fault injec…
Modeling and simulation of a digital control design approach for power supply systems
2006
Electronic designers need to model and simulate system features as close as possible to its effective behaviour. Moreover, today, electronics systems are often composed of mixed analog and digital components. The increasing complexity has led to the use of different simulation softwares, each one specific for a particular level of abstraction: mathematical, circuital, behavioural, etc. In order to simulate the entire system these softwares should work together: co-simulation is necessary for digitally controlled power electronics systems. In this paper, the modeling of a digitally controlled switching power supply system using MATLAB/Simulink, ALDEC Active-HDL and Powersys PSIM is presented…
From UML Specification into FPGA Implementation
2014
In the paper a method of using the Unified Modeling Language for specification of digital systems, especially logic controllers, is presented. The proposed method is based mainly on the UML state machine di- agrams and uses Hierarchical Concurrent Finite State Machines (HCFSMs) as a temporary model. The paper shows a way to transform the UML diagrams, expressed in XML language, to the form that is acceptable by reconfigurable FPGAs (Field Programmable Gate Ar- rays). The UML specification is used to generate an eective program in Hardware Description Languages (HDLs), especially Verilog.